Design Name | Logic |
Fitting Status | Successful |
Software Version | I.32 |
Device Used | XC9572-15-PC84 |
Date | 7-31-2006, 6:52PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
36/72 (50%) | 71/360 (20%) | 31/72 (44%) | 69/69 (100%) | 72/144 (50%) |
|
|
Signal mapped onto global clock net (GCK1) | CLK_IN |
Signal mapped onto global output enable net (GSR) | /RESET |
Macrocells in high performance mode (MCHP) | 36 |
Macrocells in low power mode (MCLP) | 0 |
Total macrocells used (MC) | 36 |