;------------------------------------------------------------------------------
;  FILENAME:   Timer32_1.asm
;   VERSION:   Rev B, 2002 Mar 30
;------------------------------------------------------------------------------
;  DESCRIPTION:
;     Timer32_1 Timer32 User Module API.
;
;------------------------------------------------------------------------------
;	Copyright (c) Cypress MicroSystems 2000-2002. All Rights Reserved.
;------------------------------------------------------------------------------

;-----------------------------------------------
; include instance specific register definitions
;-----------------------------------------------
include "m8c.inc"
include "Timer32_1.inc"

area text (ROM, REL)

;-------------------------------------------------------------------
;  Declare the functions global for both assembler and C compiler.
;
;  Note that there are two names for each API. First name is 
;  assembler reference. Name with underscore is name refence for
;  C compiler.  Calling function in C source code does not require 
;  the underscore.
;-------------------------------------------------------------------
export   Timer32_1_EnableInt 
export  _Timer32_1_EnableInt 
export   Timer32_1_DisableInt 
export  _Timer32_1_DisableInt 
export   Timer32_1_Start
export  _Timer32_1_Start
export   Timer32_1_Stop
export  _Timer32_1_Stop
export   Timer32_1_WritePeriod
export  _Timer32_1_WritePeriod
export   Timer32_1_WriteCompareValue
export  _Timer32_1_WriteCompareValue
export   Timer32_1_ReadCompareValue
export  _Timer32_1_ReadCompareValue
export   Timer32_1_ReadTimerSaveCV
export  _Timer32_1_ReadTimerSaveCV 
export   Timer32_1_ReadTimer
export  _Timer32_1_ReadTimer 
export   Timer32_1_ReadCounter        ; obsolete
export  _Timer32_1_ReadCounter        ; obsolete
export   Timer32_1_CaptureCounter     ; obsolete
export  _Timer32_1_CaptureCounter     ; obsolete

;-----------
;  EQUATES
;-----------
bfCONTROL_REG_START_BIT:   equ   1     ; Control register start bit 

;-----------------------------------------------------------------------------
;  FUNCTION NAME: Timer32_1_EnableInt
;
;  DESCRIPTION:
;     Enables this Timer's interrupt by setting the interrupt enable mask bit
;     associated with this User Module. Remember to call the global interrupt
;     enable function by using the macro: M8C_EnableGInt.
;
;  ARGUMENTS:
;     none.
;
;  RETURNS:
;     none.
;
;  SIDE EFFECTS:
;     none.
;
;  THEORY of OPERATION:  
;     Sets the specific user module interrupt enable mask bit.
;
;-----------------------------------------------------------------------------
 Timer32_1_EnableInt:
_Timer32_1_EnableInt:
   M8C_EnableIntMask Timer32_1_INT_REG, bTimer32_1_INT_MASK
   ret	


;-----------------------------------------------------------------------------
;  FUNCTION NAME: Timer32_1_DisableInt
;
;  DESCRIPTION:
;     Disables this Timer's interrupt by clearing the interrupt enable mask bit
;     associated with this User Module. 
;
;  ARGUMENTS:
;     none.
;
;  RETURNS:
;     none.
;
;  SIDE EFFECTS:
;     none.
;
;  THEORY of OPERATION:  
;     Clears the specific user module interrupt enable mask bit.
;
;-----------------------------------------------------------------------------
 Timer32_1_DisableInt:
_Timer32_1_DisableInt:
   M8C_DisableIntMask Timer32_1_INT_REG, bTimer32_1_INT_MASK
   ret


;-----------------------------------------------------------------------------
;  FUNCTION NAME: Timer32_1_Start
;
;  DESCRIPTION:
;     Sets the start bit in the Control register of this user module.  The
;     counter will begin counting on the next input clock as soon as the 
;     enable input is asserted high.
;
;  ARGUMENTS:
;     none.
;
;  RETURNS:
;     none.
;
;  SIDE EFFECTS:
;     none.
;
;  THEORY of OPERATION:  
;     Set the start bit in the Control register of the LSB block.
;
;-----------------------------------------------------------------------------
 Timer32_1_Start:
_Timer32_1_Start:
   or    reg[Timer32_1_CONTROL_LSB_REG], bfCONTROL_REG_START_BIT
   ret	


;-----------------------------------------------------------------------------
;  FUNCTION NAME: Timer32_1_Stop
;
;  DESCRIPTION:
;     Disables Timer operation.
;
;  ARGUMENTS:
;     none.
;
;  RETURNS:
;     none.
;
;  SIDE EFFECTS:
;     After this function completes, the Counter register will latch any data
;     written to the Period register.  Writing to the Period register is 
;     performed using the Timer32_1_WritePeriod function.
;
;  THEORY of OPERATION:  
;     Clear the start bit in the Control register of the LSB block.
;
;-----------------------------------------------------------------------------
 Timer32_1_Stop:
_Timer32_1_Stop:
   and   reg[Timer32_1_CONTROL_LSB_REG], ~bfCONTROL_REG_START_BIT
   ret	


;-----------------------------------------------------------------------------
;  FUNCTION NAME: Timer32_1_WritePeriod
;
;  DESCRIPTION:
;     Write the period value into the Period register.
;
;  ARGUMENTS:
;     DWORD dwPeriodValue - period count - 
;        X register points to 4 byte dword value 
;        Note that X points to MSB.
;
;  RETURNS:
;     none.
;
;  SIDE EFFECTS:
;     If the Timer user module is stopped, then this value will also be
;     latched into the Counter registers.
;
;  THEORY of OPERATION:  
;     Write data into the Period registers.
;
;-----------------------------------------------------------------------------
_Timer32_1_WritePeriod:
   ;compensate for compiler
   mov   A, X
   add   A, -3
   mov   X, A
   
 Timer32_1_WritePeriod:
   tst   reg[Timer32_1_CONTROL_LSB_REG], bfCONTROL_REG_START_BIT
   jnz   .CounterRunning

; Counter is stopped.  Due to chip errata, we have to set the clock low for
; the write to the period register to cause the data to be immediately transferred
; into the Counter.
.CounterStopped:
   M8C_SetBank1
   mov   A, reg[Timer32_1_INPUT_LSB_REG]          ; save the context of the clock - input register
   push  A
   and   reg[Timer32_1_INPUT_LSB_REG],  F0h      ; set the clock signal low
   and   reg[Timer32_1_INPUT_ISB1_REG], F0h
   and   reg[Timer32_1_INPUT_ISB2_REG], F0h
   and   reg[Timer32_1_INPUT_MSB_REG],  F0h
   M8C_SetBank0
   mov   A, [X]                                    ; load the period registers
   mov   reg[Timer32_1_PERIOD_MSB_REG], A
   mov   A, [X+1]
   mov   reg[Timer32_1_PERIOD_ISB2_REG], A
   mov   A, [X+2]
   mov   reg[Timer32_1_PERIOD_ISB1_REG], A
   mov   A, [X+3]
   mov   reg[Timer32_1_PERIOD_LSB_REG], A
   pop   A
   M8C_SetBank1
   mov   reg[Timer32_1_INPUT_LSB_REG], A          ; restore the clock
   and   A, 0Fh                                    ; High nibble is always 0x3 for higher order bits 
   or    A, 30h
   mov   reg[Timer32_1_INPUT_ISB1_REG], A         
   mov   reg[Timer32_1_INPUT_ISB2_REG], A
   mov   reg[Timer32_1_INPUT_MSB_REG],  A
   M8C_SetBank0
   ret

; Counter is running - write the period into the period register.
; Upon Terminal Count this value will get loaded into the counter.
.CounterRunning:
   mov   A, [X]
   mov   reg[Timer32_1_PERIOD_MSB_REG], A
   mov   A, [X+1]
   mov   reg[Timer32_1_PERIOD_ISB2_REG], A
   mov   A, [X+2]
   mov   reg[Timer32_1_PERIOD_ISB1_REG], A
   mov   A, [X+3]
   mov   reg[Timer32_1_PERIOD_LSB_REG], A
   ret


;-----------------------------------------------------------------------------
;  FUNCTION NAME: Timer32_1_WriteCompareValue
;
;  DESCRIPTION:
;     Writes compare value into the CompareValue register.
;
;     NOTE! The Timer user module must be STOPPED in order to write
;           the CompareValue register.
;
;  ARGUMENTS:
;     DWORD  dwCompareValue - compare value count - 
;        X register points to 4 byte dword value 
;        Note that X points to MSB.
;
;  RETURNS:
;     none.
;
;  SIDE EFFECTS:
;     none.
;
;  THEORY of OPERATION:  
;     Write data into the CompareValue registers.
;
;-----------------------------------------------------------------------------
_Timer32_1_WriteCompareValue:
   ;compensate for compiler
   mov   A, X
   add   A, -3
   mov   X, A
 Timer32_1_WriteCompareValue:
   mov   A, [X]
   mov   reg[Timer32_1_COMPARE_MSB_REG], A
   mov   A, [X+1]
   mov   reg[Timer32_1_COMPARE_ISB2_REG], A
   mov   A, [X+2]
   mov   reg[Timer32_1_COMPARE_ISB1_REG], A
   mov   A, [X+3]
   mov   reg[Timer32_1_COMPARE_LSB_REG], A
   ret


;-----------------------------------------------------------------------------
;  FUNCTION NAME: dwTimer32_1_ReadCompareValue
;
;  DESCRIPTION:
;     Reads the CompareValue registers.
;
;     DWORD * pdwCompareValue - a pointer to a DWORD buffer to put the compare value. 
;        The pointer is passed in the X register.
;        X points to the MSB.
;
;  RETURNS:
;     The CompareValue is placed in the data buffer pointed to by pdwCompareValue as
;     passed in the X register.
;
;  SIDE EFFECTS:
;     none.
;
;  THEORY of OPERATION:  
;     Read the CompareValue register and return value in buffer pointed by 
;     X.
;-----------------------------------------------------------------------------
 Timer32_1_ReadCompareValue:
_Timer32_1_ReadCompareValue:
   mov   A, reg[Timer32_1_COMPARE_MSB_REG]
   mov   [X], A
   mov   A, reg[Timer32_1_COMPARE_ISB2_REG]
   mov   [X+1], A
   mov   A, reg[Timer32_1_COMPARE_ISB1_REG]
   mov   [X+2], A
   mov   A, reg[Timer32_1_COMPARE_LSB_REG]
   mov   [X+3], A
   ret


;-----------------------------------------------------------------------------
;  FUNCTION NAME: Timer32_1_ReadTimerSaveCV
;
;  DESCRIPTION:
;     Reads the count in the Counter register.  This function preserves the
;     contents of the CompareValue register.  However, the cost of doing so
;     is that the counter is halted.  This may cause the timer to miss one or 
;     more counts, depending on the speed of the input clock.
;
;  ARGUMENTS:
;     DWORD * pdwCount - a pointer to a DWORD buffer to put the counter value. 
;        The pointer is passed in the X register.
;     X points to the MSB 
;
;  RETURNS:
;     The read value is placed in the data buffer pointed to by pdwCount as
;     passed in the X register.
;
;  SIDE EFFECTS:
;     1) May cause an interrupt, if interrupt on CompareValue is enabled.
;     2) The user module is stopped momentarily while the compare value is
;        restored.  This may cause the Count register to miss one or more
;        counts depending on the input clock speed.
;     3) Interrupts are momentarily disabled - this may cause other interrupt
;        latency issues.
;
;  THEORY of OPERATION:  
;     1) Read and save the CompareValue register.
;     2) Read the Counter register, causing its data to be latched into 
;        the CompareValue register.
;     3) Read and save the Counter value, now in the CompareValue register,
;        to the buffer.
;     4) Disable global interrupts
;     5) Halt the timer
;     6) Restore the CompareValue register values
;     7) Start the Counter again
;     8) Restore global interrupt state
;
;-----------------------------------------------------------------------------
 Timer32_1_ReadTimerSaveCV:
_Timer32_1_ReadTimerSaveCV: 
 Timer32_1_ReadCounter:            ; obsolete
_Timer32_1_ReadCounter:            ; obsolete

   ; save the control register on the stack
   mov   A, reg[Timer32_1_CONTROL_LSB_REG]
   push  A

   ; save the CompareValue register value
   mov   A, reg[Timer32_1_COMPARE_MSB_REG]    
   push  A
   mov   A, reg[Timer32_1_COMPARE_ISB2_REG]    
   push  A
   mov   A, reg[Timer32_1_COMPARE_ISB1_REG]    
   push  A
   mov   A, reg[Timer32_1_COMPARE_LSB_REG]    
   push  A

   ; Read the LSB counter. This latches the counter data into the
   ; CompareValue register of all bytes of chained PSoC blocks!
   ; This may cause an interrupt.
   mov   A, reg[Timer32_1_COUNTER_LSB_REG]    

   ; Read the CompareValue register, which contains the counter value
   ; and store ther return result
   mov   A, reg[Timer32_1_COMPARE_MSB_REG]    
   mov   [X], A
   mov   A, reg[Timer32_1_COMPARE_ISB2_REG]    
   mov   [X+1], A
   mov   A, reg[Timer32_1_COMPARE_ISB1_REG]    
   mov   [X+2], A
   mov   A, reg[Timer32_1_COMPARE_LSB_REG]    
   mov   [X+3], A
   
   ; determine current interrupt state and save in X
   mov   A, 0
   tst   reg[CPU_SCR], CPUSCR_GIEMask
   jz    .SetupStatusFlag
   mov   A, FlagGlobalIE
.SetupStatusFlag:
   mov   X, A
      
   ; disable interrupts for the time being
   M8C_DisableGInt   

   ; stop the timer
   and   reg[Timer32_1_CONTROL_LSB_REG], ~bfCONTROL_REG_START_BIT

   ; Restore the CompareValue register
   pop   A
   mov   reg[Timer32_1_COMPARE_LSB_REG], A
   pop   A
   mov   reg[Timer32_1_COMPARE_ISB1_REG], A
   pop   A
   mov   reg[Timer32_1_COMPARE_ISB2_REG], A
   pop   A
   mov   reg[Timer32_1_COMPARE_MSB_REG], A

   ; start the timer
   pop   A
   mov   reg[Timer32_1_CONTROL_LSB_REG], A

   ; put the flag register to restore on the stack
   push  X

   ; Use RETI because it pops a the flag register off the stack
   ; and then returns to the caller.
   reti


;-----------------------------------------------------------------------------
;  FUNCTION NAME: Timer32_1_ReadTimer
;
;  DESCRIPTION:
;     Performs a software capture of the Counter register.  A synchronous
;     read of the counter register is performed.  The timer is NOT stopped.
;
;     WARNING - this will cause loss of the CompareValue register data.
;
;  ARGUMENTS:
;     DWORD * pdwCount - a pointer to a DWORD buffer to put the counter value. 
;        The pointer is passed in the X register.
;     X points to the MSB 
;
;  RETURNS:
;     The read value is placed in the data buffer pointed to by pdwCount as
;     passed in the X register.
;
;  SIDE EFFECTS:
;     May cause an interrupt.
;
;  THEORY of OPERATION:  
;     1) Read the CounterRegister - this causes the count value to be 
;        latched into the CompareValue registers.
;     2) Read and return the count register values from the CompareValue
;        registers into the return buffer.
;
;-----------------------------------------------------------------------------
 Timer32_1_ReadTimer:
_Timer32_1_ReadTimer: 
 Timer32_1_CaptureCounter:      ; obsolete
_Timer32_1_CaptureCounter:      ; obsolete

   ; Read the LSB counter. This latches the counter data into the
   ; CompareValue register of all bytes of chained PSoC blocks!
   ; This may cause an interrupt.
   mov   A, reg[Timer32_1_COUNTER_LSB_REG]    

   ; Read the CompareValue register, which contains the counter value
   ; and store ther return result
   mov   A, reg[Timer32_1_COMPARE_MSB_REG]    
   mov   [X+0], A
   mov   A, reg[Timer32_1_COMPARE_ISB2_REG]    
   mov   [X+1], A
   mov   A, reg[Timer32_1_COMPARE_ISB1_REG]    
   mov   [X+2], A
   mov   A, reg[Timer32_1_COMPARE_LSB_REG]    
   mov   [X+3], A

   ret
; end of Timer32 API code